Datasheet

78K0/Ix2 CHAPTER 14 SERIAL INTERFACE UART6/DALI

R01UH0010EJ0500 Rev.5.00 451

Feb 28, 2012

When bit 7 (POWER6) of UART/DALI operation mode register 6 (ASIM6) is set to 1 and bit 6 (TXE6) of ASIM6 is

then set to 1, transmission is enabled. Transmission can be started by writing transmit data to UART/DALI

transmit buffer register 6 (TXB6). The start bit, parity bit, and stop bit are automatically appended to the data.

When transmission is started, the data in TXB6 is transferred to UART/DALI transmit shift register 6 (TXS6).

After that, the transmit data is sequentially output from TXS6 to the T

XD6 pin. When transmission is completed,

the parity and stop bits set by ASIM6 are appended and a transmission completion interrupt request (INTST6) is

generated.

Transmission is stopped until the data to be transmitted next is written to TXB6.

Figure 14-17 shows the timing of the transmission completion interrupt request (INTST6). This interrupt occurs

as soon as the last stop bit has been output.

Figure 14-17. Normal Transmission Completion Interrupt Request Timing

1. Stop bit length: 1

INTST6

D0Start D1 D2 D6 D7 Stop

XD6 (output)

Parity

2. Stop bit length: 2

TXD6 (output)

INTST6

D0Start D1 D2 D6 D7 Parity Stop