Datasheet

78K0/Ix2 CHAPTER 12 OPERATIONAL AMPLIFIER
R01UH0010EJ0500 Rev.5.00 405
Feb 28, 2012
Cautions 1. Set a channel to be used for A/D conversion in the input mode by using port mode registers 2
and 7 (PM2, PM7).
2. Set ADS after PGA operation setting when selecting the PGA output signal as analog input. Set
ADS after single AMP operation setting when selecting the operational amplifier output signal as
analog input.
3. To select the internal voltage (1.2 V) as an analog input, set the ADCS bit to 1 when at least 10
s
have elapsed after having set the V12SEL bit to 1 while the A/D conversion operation was
stopped (ADCS = 0).
4. If data is written to ADS, a wait cycle is generated. Do not write data to ADS when the peripheral
hardware clock (f
PRS) is stopped. For details, refer to CHAPTER 31 CAUTIONS FOR WAIT.
(4) Port mode register 2 (PM2)
When using AMP-/ANI0/P20, AMPOUT/PGAIN/ANI1/P21, and AMP+/ANI2/P22 pins for the operational amplifier, set
PM20 to PM22 to 1.
The output latches of P20 to P22 at this time may be 0 or 1.
If PM20 to PM22 are set to 0, they cannot be used as the operational amplifier pins.
PM2 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets PM2 to FFH.
Figure 12-5. Format of Port Mode Register 2 (PM2)
(1) 78K0/IY2
Address: FF22H After reset: FFH R/W
Symbol 7 6 5 4 3 2 1 0
PM2 1 1 PM25 PM24 PM23 PM22 1 PM20
Caution Be sure to set bits 1, 6, and 7 of PM2 to 1.
(2) 78K0/IA2
Address: FF22H After reset: FFH R/W
Symbol 7 6 5 4 3 2 1 0
PM2 1 1 PM25 PM24 PM23 PM22 PM21 PM20
Caution Be sure to set bits 6 and 7 of PM2 to 1.
(3) 78K0/IB2
Address: FF22H After reset: FFH R/W
Symbol 7 6 5 4 3 2 1 0
PM2 PM27 PM26 PM25 PM24 PM23 PM22 PM21 PM20
PM2n P2n pin I/O mode selection (n = 0 to 7)
0 Output mode (output buffer on)
1 Input mode (output buffer off)