Datasheet

78K0/Ix2 CHAPTER 11 A/D CONVERTER
R01UH0010EJ0500 Rev.5.00 393
Feb 28, 2012
 Timer trigger mode
<1> Set the A/D conversion time and the operation mode by using bits 5 to 1 (FR2 to FR0, LV1, and LV0) of the
A/D converter mode register 0 (ADM0).
<2> Set bit 0 (ADCE) of ADM0 to 1.
<3> Set the channel to be used to analog input by using the A/D port configuration registers 0 and 1 (ADPC0,
ADPC1) and port mode registers 2 and 7 (PM2, PM7).
<4> Set the PGA operation to set the PGA output and the single Amp operation to set the operational amplifier
output for analog input. (refer to CHAPTER 12 OPERATIONAL AMPLIFIER).
<5> Select TMX0 or TMX1 synchronization by using bits 4 and 5 (ADTRG0, ADTRG1) of the analog input
channel specification register (ADS).
<6> Select a channel to be used by using the analog input channel specification register (ADS).
<7> Set the timer trigger wait state by setting (1) bit 7 (ADCS) of ADM0.
<8> A conversion operation is started when a trigger signal (TMX0 or TMX1 output) is detected.
<9> When one A/D conversion has been completed, an interrupt request signal (INTAD) is generated.
<10> Transfer the A/D conversion data to the A/D conversion result register (ADCRXn, ADCRXnL).
<Change the channel>
<11> Set bit 0 (ADMK) of the interrupt mask flag register 1L (MK1L) to 1
Note
.
<12> Change the channel by using ADS to start A/D conversion.
<13> Clear bit 0 (ADIF) of the interrupt request flag register 1L (IF1L) to 0.
<14> Clear ADMK to 0
Note
.
<15> When one A/D conversion has been completed, an interrupt request signal (INTAD) is generated.
<16> Transfer the A/D conversion data to the A/D conversion result register (ADCRXn, ADCRHXnL).
<Complete A/D conversion>
<17> Clear ADCS to 0.
<18> Clear ADCE to 0.
Note Execute this only if interrupt servicing is used for A/D conversion.
Cautions 1. Make sure the period of <2> to <7> is 1
 s or more.
2. If the timing of <2> is earlier than that of <6>, <2> may be performed any time.
3. <2> can be omitted. However, ignore data of the first conversion after <8> in this case.
4. The period from <9> to <15> differs from the conversion time set using bits 5 to 1 (FR2 to
FR0, LV1, and LV0) of ADM0. The period from <12> to <15> is the conversion time set using
FR2 to FR0, LV1, and LV0.
5. When switching from timer trigger mode to software trigger mode, switch the operation
mode and input channel after stopping the A/D conversion operation (clearing (0) ADCS).
6. To select the internal voltage (1.2 V) as an analog input, set the ADCS bit to 1 when at least
10
 s have elapsed after having set the V12SEL bit to 1 while the A/D conversion operation
was stopped (ADCS = 0).