Datasheet

78K0/Ix2 CHAPTER 11 A/D CONVERTER
R01UH0010EJ0500 Rev.5.00 369
Feb 28, 2012
Table 11-1. Settings of ADCS and ADCE
ADCS ADCE A/D Conversion Operation
0 0 Stop status (DC power consumption path does not exist)
0 1 Conversion waiting mode (only A/D voltage comparator consumes power)
1 0 Setting prohibited
1 1 Conversion mode (A/D voltage comparator operation)
Figure 11-3. Timing Chart When Comparator Is Used
ADCE
A/D voltage comparator
ADCS
LV0
(set to high-speed mode 2)
Conversion
operation
Conversion
operation
Conversion
stopped
Conversion
waiting
Comparator operation
Note 1
Note 2
Notes 1. To stabilize the internal circuit, the time from setting ADCE to 1 to setting ADCS to 1 must be 1
s or longer.
2. To stabilize the internal circuit, the time from setting LV0 to 1 (high-speed mode 2) to setting ADCS to 1 must
be 1
s or longer (for operation mode setting, refer to Table 11-2).
Cautions 1. A/D conversion must be stopped before rewriting bits FR0 to FR2, LV1, and LV0 to values other
than the identical data.
2. If data is written to ADM0, a wait cycle is generated. Do not write data to ADM0 when the
peripheral hardware clock (f
PRS) is stopped. For details, refer to CHAPTER 31 CAUTIONS FOR
WAIT.