Datasheet

78K0/Ix2 CHAPTER 11 A/D CONVERTER
R01UH0010EJ0500 Rev.5.00 368
Feb 28, 2012
11.3 Registers Used in A/D Converter
The A/D converter uses the following six registers.
 A/D converter mode register 0 (ADM0)
 A/D port configuration registers 0, 1 (ADPC0, ADPC1)
 Analog input channel specification register (ADS)
 Port mode registers 2, 7 (PM2, PM7)
 10-bit A/D conversion result register (ADCR)
 8-bit A/D conversion result register L (ADCRL)
 8-bit A/D conversion result register H (ADCRH)
 10-bit A/D conversion result register for TMXn synchronization (ADCRXn)
 8-bit A/D conversion result register L for TMXn synchronization (ADCRXnL)
Remark n = 0, 1
(1) A/D converter mode register 0 (ADM0)
ADM0 sets the conversion time for analog input to be A/D converted, and starts/stops conversion.
ADM0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears ADM0 to 00H.
Figure 11-2. Format of A/D Converter Mode Register 0 (ADM0)
ADCELV0
Note 1
LV1
Note 1
FR0
Note 1
FR1
Note 1
FR2
Note 1
0ADCS
A/D conversion operation control
Stops conversion operation
Enables conversion operation
ADCS
0
1
<0>123456<7>
ADM0
A
ddress: FF28H After reset: 00H R/W
S
ymbol
A/D voltage comparator operation control
Note 2
Stops A/D voltage comparator operation
Enables A/D voltage comparator operation
ADCE
0
1
Notes 1. For details of FR2 to FR0, LV1, LV0, and A/D conversion, refer to Table 11-2 A/D Conversion Time
Selection.
2. The operation of the A/D voltage comparator is controlled by ADCS and ADCE, and it takes 1
 s from
operation start to operation stabilization. Therefore, when ADCS is set to 1 after 1  s or more has
elapsed from the time ADCE is set to 1, the conversion result at that time has priority over the first
conversion result. Otherwise, ignore data of the first conversion.