Datasheet

78K0/Ix2 CHAPTER 9 8-BIT TIMER H1
R01UH0010EJ0500 Rev.5.00 353
Feb 28, 2012
<10> By performing the procedures above, an arbitrary carrier clock is obtained. To stop the count operation, clear
TMHE1 to 0.
If the setting value of the CMP01 register is N, the setting value of the CMP11 register is M, and the count clock
frequency is f
CNT, the carrier clock output cycle and duty are as follows.
Carrier clock output cycle = (N + M + 2)/f
CNT
Duty = High-level width/carrier clock output width = (M + 1)/(N + M + 2)
Cautions 1. Be sure to set the CMP11 register when starting the timer count operation (TMHE1 = 1)
after the timer count operation was stopped (TMHE1 = 0) (be sure to set again even if
setting the same value to the CMP11 register).
2. Set so that the count clock frequency of TMH1 becomes more than 6 times the count clock
frequency of TM51.
3. Set the values of the CMP01 and CMP11 registers in a range of 01H to FFH.
4. The set value of the CMP11 register can be changed while the timer counter is operating.
However, it takes the duration of three operating clocks (signal selected by the CKS12 to
CKS10 bits of the TMHMD1 register) since the value of the CMP11 register has been
changed until the value is transferred to the register.
5. Be sure to set the RMC1 bit before the count operation is started.
Remarks 1. For the setting of the output pin, refer to 9.3 (4) Port mode registers 0 and 3 (PM0, PM3).
2. For how to enable the INTTMH1 signal interrupt, refer to CHAPTER 18 INTERRUPT
FUNCTIONS.