Datasheet

78K0/Ix2 CHAPTER 7 16-BIT TIMER/EVENT COUNTER 00
R01UH0010EJ0500 Rev.5.00 293
Feb 28, 2012
(3) Free-running timer mode operation
(CR000: capture register, CR010: capture register)
Figure 7-37. Block Diagram of Free-Running Timer Mode
(CR000: Capture Register, CR010: Capture Register)
Timer counter
(TM00)
Capture register
(CR000)
Capture
signal
Capture signal
Interrupt signal
(INTTM010)
Interrupt signal
(INTTM000)
Capture register
(CR010)
Operable bits
TMC003, TMC002
Count clock
Edge
detection
TI000 pin
Edge
detection
TI010 pin
Selector
Remark If both CR000 and CR010 are used as capture registers in the free-running timer mode, the TO00 output
level is not inverted.
However, it can be inverted each time the valid edge of the TI000 pin is detected if bit 1 (TMC001) of 16-bit
timer mode control register 00 (TMC00) is set to 1.