Datasheet

78K0/Ix2 CHAPTER 7 16-BIT TIMER/EVENT COUNTER 00
R01UH0010EJ0500 Rev.5.00 287
Feb 28, 2012
Figure 7-31. Example of Register Settings in Clear & Start Mode Entered by TI000 Pin Valid Edge Input (1/2)
(a) 16-bit timer mode control register 00 (TMC00)
0000100/10
TMC003 TMC002 TMC001 OVF00
Clears and starts at valid
edge input of TI000 pin.
0: Inverts TO00 output on match
between TM00 and CR000/CR010.
1: Inverts TO00 output on match
between TM00 and CR000/CR010
and valid edge of TI000 pin.
(b) Capture/compare control register 00 (CRC00)
000000/10/10/1
CRC002 CRC001 CRC000
0: CR000 used as compare register
1: CR000 used as capture register
0: CR010 used as compare register
1: CR010 used as capture register
0: TI010 pin is used as capture
trigger of CR000.
1: Reverse phase of TI000 pin is
used as capture trigger of CR000.
(c) 16-bit timer output control register 00 (TOC00)
0 0 0 0/1 0/1
LVR00LVS00TOC004OSPE00OSPT00 TOC001 TOE00
0: Disables TO00 output
Note
1: Enables TO00 output
00: Does not invert TO00 output on match
between TM00 and CR000/CR010.
01: Inverts TO00 output on match between
TM00 and CR000.
10: Inverts TO00 output on match between
TM00 and CR010.
11: Inverts TO00 output on match between
TM00 and CR000/CR010.
Specifies initial value of
TO00 output F/F
0/1 0/1 0/1
Note The timer output (TO00) cannot be used when detecting the valid edge of the TI010 pin is used.