Datasheet

78K0/Ix2 CHAPTER 7 16-BIT TIMER/EVENT COUNTER 00
R01UH0010EJ0500 Rev.5.00 285
Feb 28, 2012
Figure 7-30. Timing Example of Clear & Start Mode Entered by TI000 Pin Valid Edge Input
(CR000: Capture Register, CR010: Capture Register) (2/3)
(b) TOC00 = 13H, PRM00 = C0H, CRC00 = 05H, TMC00 = 0AH
TM00 register
0000H
Operable bits
(TMC003, TMC002)
Capture trigger input
(TI010 pin input)
Capture register
(CR000)
Capture interrupt
(INTTM000)
Capture & count clear input
(TI000)
Capture register
(CR010)
Capture interrupt
(INTTM010)
10
R
S
T
O
L
M
N
P
Q
00
FFFFH
L
L
0000H
0000H
LMN
O
PQ R S T
This is a timing example where an edge is not input to the TI000 pin, in an application where the count value is
captured to CR000 when the rising or falling edge of the TI010 pin is detected.