Datasheet
78K0/Ix2 CHAPTER 7 16-BIT TIMER/EVENT COUNTER 00
R01UH0010EJ0500 Rev.5.00 281
Feb 28, 2012
(3) Operation in clear & start mode by entered TI000 pin valid edge input
(CR000: capture register, CR010: compare register)
Figure 7-27. Block Diagram of Clear & Start Mode Entered by TI000 Pin Valid Edge Input
(CR000: Capture Register, CR010: Compare Register)
Timer counter
(TM00)
Clear
Output
controller
Note
Edge
detection
Capture register
(CR000)
Capture signal
Match signal
Interrupt signal
(INTTM010)
Interrupt signal
(INTTM000)
TI000 pin
Compare register
(CR010)
Operable bits
TMC003, TMC002
Count clock
TO00 pin
Note
TO00 output
Note
Note 78K0/IB2 (30 pins) only