Datasheet

78K0/Ix2 CHAPTER 7 16-BIT TIMER/EVENT COUNTER 00
R01UH0010EJ0500 Rev.5.00 276
Feb 28, 2012
Figure 7-22. Example of Software Processing in External Event Counter Mode
TM00 register
0000H
Operable bits
(TMC003, TMC002)
1100
N N N
TMC003, TMC002 bits = 11
TMC003, TMC002 bits = 00
Register initial setting
PRM00 register,
CRC00 register,
TOC00 register
Note
,
CR000 register,
port setting
START
STOP
<1> <2>
Compare match interrupt
(INTTM000)
Compare register
(CR000)
TO00 output control bits
(TOC004, TOC001, TOE00)
TO00 output
N
00
Initial setting of these registers is performed before
setting the TMC003 and TMC002 bits to 11.
Starts count operation
The counter is initialized and counting is stopped
by clearing the TMC003 and TMC002 bits to 00.
<1> Count operation start flow
<2> Count operation stop flow
Note Care must be exercised when setting TOC00. For details, refer to 7.3 (3) 16-bit timer output control
register 00 (TOC00).