Datasheet

78K0/Ix2 CHAPTER 6 16-BIT TIMERS X0 AND X1
R01UH0010EJ0500 Rev.5.00 246
Feb 28, 2012
(2) High-impedance output mode select register (HIZTRS)
HIZTRS is a register that selects the signal to be used as the high-impedance control trigger and the pin to be set to
the high-impedance output state.
HIZTRS can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears HIZTRS to 00H.
Figure 6-57. Format of High-impedance Output Mode Select Register (HIZTRS)
Address: FF6FH After reset: 00H R/W
Symbol <7> <6> 5 4 <3> <2> <1> <0>
HIZTRS HIZTRS1 HIZTRS0 0 0 HIZPTS3 HIZPTS2 HIZPTS1 HIZPTS0
HIZTRS1 HIZTRS0 Selection of signal to be used as trigger
0 0 INTP0
0 1 Comparator 0 output
1 0 Comparator 1 output
1 1 Comparator 2 output
HIZPTS3 P34/TOX11 pin control
0 Normal output
1 Can be used as high-impedance output
HIZPTS2 P33/TOX10 pin control
0 Normal output
1 Can be used as high-impedance output
HIZPTS1 P32/TOX01 pin control
0 Normal output
1 Can be used as high-impedance output
HIZPTS0 P31/TOX00 pin control
0 Normal output
1 Can be used as high-impedance output