Datasheet
78K0/Ix2 CHAPTER 1 OUTLINE
R01UH0010EJ0500 Rev.5.00 12
Feb 28, 2012
1.4.3 78K0/IB2
30-pin
PORT 0
P00 to P02
PORT 2
P20 to P27
8
PORT 3
P30 to P37
POWER ON CLEAR/
LOW VOLTAGE
INDICATOR
POC/LVI
CONTROL
RESET CONTROL
PORT 6
P60, P61
2
PORT 7
P70
P121, P122, P125
3
PORT 12
SYSTEM
CONTROL
RESET/P125
X1/P121
X2/EXCLK/P122
INTERRUPT
CONTROL
8
A/D CONVERTER
AV
REF
INTP0/P00
SERIAL
INTERFACE IICA
SDAA0/P61
SCLA0/P60
INTP1/P30 to INTP3/P32,
INTP4/P34, INTP5/P02
INTERNAL
HIGH-SPEED
RAM
78K/0
CPU
CORE
FLASH
MEMORY
8-bit TIMER
H1
TOH1/P30
WATCHDOG TIMER
16-bit TIMER/
EVENT COUNTER 00
TI000/P00
RxD6/P61 (LINSEL)
TxD6/P60 (LINSEL)
RxD6/P61
TxD6/P60
SERIAL
INTERFACE UART6
LINSEL
ON-CHIP DEBUG
INTERNAL
HIGH-SPEED
OSCILLATOR
INTERNAL
LOW-SPEED
OSCILLATOR
OPERATIONAL
AMPLIFIER
Note
AMP+
Note
/P22
AMP-
Note
/P20
AMPOUT
Note
/P21
3
8
ANI0/P20 to ANI7/P27
TOOLC0/X1, TOOLC1/P31
TOOLD0/X2, TOOLD1/P32
TO00/TI010/P01
5
VOLTAGE
REGULATOR
REGC
8-bit TIMER/
EVENT COUNTER 51
TI51/P30
SERIAL
INTERFACE CSI11
SCK11/P35
SO11/P37
CMPCOM/P26
SI11/P36
ANI8/P70
AV
SS
V
SS
V
DD
COMPARATOR
3
CMP0+/P24,
CMP1+/P25,
CMP2+/P23
SSI11/P02
16-bit TIMER
X0
TOX01/P32
TOX00/P31
16-bit TIMER
X1
TOX11/P34
TOX10/P33
<TI000>/P121
<INTP0>/P121
PROGRAMMABLE
GAIN AMPLIFIER
Note
PGAIN
Note
/P21
Note
PD78F0755, 78F0756 (products with operational amplifier) only
Cautions 1. Connect the REGC pin to V
SS via a capacitor (0.47 to 1
F).
2. ANI0/P20/AMP-, ANI1/P21/AMPOUT/PGAIN, ANI2/P22/AMP+, ANI3/P23/CMP2+, ANI4/P24/CMP0+,
ANI5/P25/CMP1+, ANI6/P26/CMPCOM, ANI7/P27, and ANI8/P70 are set in the analog input mode
after release of reset.
3. RESET/P125 immediately after release of reset is set in the external reset input.
Remark Functions in angle brackets < > can be assigned by setting the input switch control register (MUXSEL).