Datasheet

78K0/Ix2 CHAPTER 6 16-BIT TIMERS X0 AND X1
R01UH0010EJ0500 Rev.5.00 235
Feb 28, 2012
6.6 Interlocking Function with Comparator or INTP0
16-bit timers X0 and X1 can control PWM waveforms by interlocking with the output of comparators 0 to 2 or the INTP0
input signal, without involving the CPU.
TMX0 and TMX1, comparators 0 to 2, and INTP0 can be combined as follows.
16-bit timer X0 (TMX0-Only operation mode, synchronous start mode): CMP0, CMP1, CMP2, INTP0
16-bit timer X1 (TMX1-Only operation mode, synchronous start mode): CMP0, CMP1
16-bit timers X0 and X1 (synchronous start/clear mode): CMP2, INTP0
Figure 6-43. Block Diagram of 16-Bit Timer X0 Output Configuration
Level
controller
TOX00/P31
TOTX0C0
TOTX0C1
TOX01/P32
TOTX0C2
INTTMX0
TOTX0C3
Timer counter clear signal
Capture trigger signal
Comparator 0 output
INTP0
PM31
PM32
TOH1
(from TMH1)
Level
controller
Timer clear
controller
Mode
selector
Mode
selector
Mode
selector
Output gate
control circuit
Output gate
control circuit
Output latch
(P31)
Output latch
(P32)
Comparator 1 output
Comparator 2 output
Note1
Note1
Note2
Note2
Note2
Notes 1. Timer output is controlled by the level controller according to the value of the compare register and the
mode selector output.
2. Resetting timer output (interlocking modes 1 and 3) and clearing the timer counter (interlocking modes 1
and 2) are controlled by the mode selector according to the comparator output or INTP0 input.