Datasheet

78K0/Ix2 CHAPTER 6 16-BIT TIMERS X0 AND X1
R01UH0010EJ0500 Rev.5.00 234
Feb 28, 2012
Figure 6-41. Example of Register Settings for PWM Output Operation
(TMX0 and TMX1 synchronous start/clear mode, PWM Output
from TOX00, TOX01, TOX10, and TOX11 When TOH1 Output Is at High Level) (2/2)
(c) 16-bit timer Xn output control register 0
0TXnIOC0 0 0 0 1
TXnTOL1TXnTOC0TXnTOC1 TXnTOL0
Enables timer output
1 0/1 0/1
0: Normal output (low level)
1: Inverted output (high level)
Remark n = 0, 1
Figure 6-42. PWM Output Timing (TMX0 and TMX1 synchronous start/clear mode, PWM Output
from TOX00, TOX01, TOX10, and TOX11 When TOH1 Output Is at High Level)
TOH1 output
(intarnal output)
TOX01 output
(intarnal output)
TOX00 output
(intarnal output)
TOX11 output
(intarnal output)
TOX10 output
(intarnal output)
TOX01 pin output
(TX0TOL1 = 0)
TOX00 pin output
(TX0TOL0 = 0)
TOX11 pin output
(TX1TOL1 = 0)
TOX10 pin output
(TX1TOL0 = 0)
0000H
0000H
FFFFH
FFFFH
16-bit timer counter X1
16-bit timer counter X0