Datasheet

78K0/Ix2 CHAPTER 6 16-BIT TIMERS X0 AND X1
R01UH0010EJ0500 Rev.5.00 226
Feb 28, 2012
Figure 6-33. Example of Register Settings for PWM Output Operation (TMX0 and TMX1 synchronous start/clear
mode)
(a) 16-bit timer X0 operation control register 0
1TX0CTL0 0 0 0 0
TX0CKS2TX0TMC TX0CKS1 TX0CKS0
0/1 0/1 0/1
Selects count clock
Starts timer count operation
(b) 16-bit timer Xn operation control register 1
0/1TX0CTL1 0 0 0 0/1
TX0INTPST
TX0PWMCE TX0PWMCINV TX0PWM
000
0: Single output
1: Dual output
0: Starts counting when TX0TMC bit = 1.
1: Starts timer counting when TX0TMC bit = 1
and INTP0 rising edge is detected.
Using the TOX0n output gate function by
TOH1 output is prohibited.
0TX1CTL1 0 0 0 0/1
TX1PWM TX1MD1 TX1MD0
010
TMX0 and TMX1 synchronous
start/clear mode
TX1PWMCE
Using the TOX1n output gate function by
TOH1 output is prohibited.
0: Single output
1: Dual output
(c) 16-bit timer Xn output control register 0
0TXnIOC0 0 0 0 0/1
TXnTOL1TXnTOC0TXnTOC1 TXnTOL0
0/1 0/1 0/1
0: Normal output (low level)
1: Inverted output (high level)
0: Disables timer output
1: Enables timer output
Remark n = 0, 1