Datasheet

78K0/Ix2 CHAPTER 6 16-BIT TIMERS X0 AND X1
R01UH0010EJ0500 Rev.5.00 224
Feb 28, 2012
(4) PWM output operation (TMX0 and TMX1 synchronous start/clear mode)
Output cycles from the two timer outputs of TMX0 and TMX1 (up to 4 outputs) are synchronized.
Setting bit 7 (TX0TMC) of TX0CTL1 to 1 starts PWM output.
Setting bit 7 (TX0TMC) of TX0CTL1 to 0 stops PWM output.
TXnCRm can be rewritten while the timers are operating, and the duty and the pulse cycle can be changed.
(a) TMX0 single output, TMX1 single output or dual output
● Pulse cycle and duty of TOX00
 Pulse cycle = (Set value of TX0CR1 + 1)  Count clock cycle
 Duty = (Set value of TX0CR1
Note 1
 Set value of TX0CR0
Note 1
) / (Set value of TX0CR1 + 1)
● Pulse cycle and duty of TOX10
 Pulse cycle = (Set value of TX0CR1 + 1)  Count clock cycle
 Duty = (Set value of TX1CR1
Note 1
 Set value of TX1CR0
Note 1
) / (Set value of TX0CR1 + 1)
● Pulse cycle and duty of TOX11
Note 2
 Pulse cycle = (Set value of TX0CR1 + 1)  Count clock cycle
 Duty = (Set value of TX1CR3
Note 1
 Set value of TX1CR2
Note 1
) / (Set value of TX0CR1 + 1)
When changing TXnCRm, be sure to rewrite TX0CR1 after rewriting the registers other than TX0CR1. The registers
other than TX0CR1 that are not to be changed do not have to be rewritten. If one of the registers other than TX0CR1
needs to be changed but TX0CR1 does not need to be changed, be sure to write the same value to TX0CR1.
The output is changed when the INTTMX0 interrupt is generated immediately after TX0CR1 is written. However, if
TX0CR1 is rewritten during the clock
Note 3
cycle in which the INTTMX0 interrupt was generated, or during the previous
two clock
Note 3
cycles, the output will be changed when the INTTMX0 interrupt subsequent to this INTTMX0 interrupt
is generated. Note also that if TXnCRm is written with a different value in the period between when TX0CR1 is
written and when the output changes, the output will be changed to this different value, not the originally specified
value.
To specify PWM output from TOX00, set TX0CR0 and TX0CR1 to a value in the following range:
0000H  TX0CR0  TX0CR1  FFFFH
If TX0CR0 = TX0CR1 is specified, the output will be set to the default status (fixed).
To specify PWM output from TOX10, set TX1CR0 and TX1CR1 to a value in the following range:
0000H  TX1CR0  TX1CR1  TX0CR1
If TX1CR0 = TX1CR1 is specified, the output will be set to the default status (fixed).
To specify PWM output from TOX11
Note 2
, set TX1CR2 and TX1CR3 to a value in the following range:
0000H  TX1CR2  TX1CR3  TX0CR1
If TX1CR2 = TX1CR3 is specified, the output will be set to the default status (fixed).
Notes 1. The output is inverted when the counter reaches TXnCRm + 1.
2. TMX1 dual output only
3. Count clock of 16-bit timer Xn
<R>
<R>
<R>
<R>