Datasheet

78K0/Ix2 CHAPTER 6 16-BIT TIMERS X0 AND X1
R01UH0010EJ0500 Rev.5.00 220
Feb 28, 2012
Figure 6-29. Example of Register Settings for PWM Output Operation (Dual Mode) (2/2)
(c) 16-bit timer Xn output control register 0
0TXnIOC0 0 0 0 1
TXnTOL1TXnTOC0TXnTOC1 TXnTOL0
Enables timer output
1 0/1 0/1
0: Normal output (low level)
1: Inverted output (high level)
Remark n = 0, 1
Figure 6-30. PWM Output Timing (TMXn-only Operation, PWM output: TOXn0 and TOXn1 pins)
D0 D0'
D
0 D0'
D
1
D1
D1'
D
2
D2
D2'
TOXn0 pin output
(TXnTOL0 = 0)
D
3
D3
D3'
D
0
D1
D2
D3D3
D0
D1
D2
TOXn0 pin output
(TXnTOL0 = 1)
D3'
D
0'
D
1'
D2'
D3
D0
D1
D2
D1'
D2'
D3'
TOXn1 pin output
(TXnTOL1 = 0)
TOXn1 pin output
(TXnTOL1 = 1)
INTTMXn signal
FFFFH
16-bit timer counter Xn
0000H
16-bit timer Xn compare
register 0 (TXnCR0)
16-bit timer Xn compare
buffer register 0
16-bit timer Xn compare
register 1 (TXnCR1)
16-bit timer Xn compare
buffer register 1
16-bit timer Xn compare
register 3 (TXnCR3)
16-bit timer Xn compare
buffer register 3
16-bit timer Xn compare
register 2 (TXnCR2)
16-bit timer Xn compare
buffer register 2
D
0+1
D1+1
Remark n = 0, 1
<R>