Datasheet

78K0/Ix2 CHAPTER 6 16-BIT TIMERS X0 AND X1
R01UH0010EJ0500 Rev.5.00 214
Feb 28, 2012
Figure 6-25. Example of Register Settings for Capture Function Operation
(a) 16-bit timer Xn operation control register 0 (TXnCTL0)
0 0 0 0 0/1 0/1 0/11
TXnCKS2 TXnCKS1 TXnCKS0 TXnTMC
Selects count clock
Starts timer count operation
(b) 16-bit timer X0 operation control register 1 (TX0CTL1)
00000000/1
TX0INTPST TX0PWMCE TX0PWM TX0PWMCINV
Select target compare register of INTTMX0
0: INTTMX0 is generated upon match of counter and TX0CR1 register
1: INTTMX0 is generated upon match of counter and TX0CR3 register
(c) 16-bit timer X1 operation control register 1 (TX1CTL1)
0 0 0 0 0/1 0 0/1 0/1
TX1PWM TX1MD1 TX1MD0TX1PWMCE
Select target compare register of INTTMX1
0: INTTMX1 is generated upon match of counter and TX1CR1 register
1: INTTMX1 is generated upon match of counter and TX1CR3 register
Operation mode setting
00 : TMX1-only start mode
(d) 16-bit timer Xn operation control register 2 (TXnCTL2)
0000 00/1 0 1
TX0TRGS TXnADEN TXnCCS
TMX0 capture trigger source selection
0 : INTCMP2
1 : INTP0
TXnCCR0 used as
compare register.
Note
Note The TX0TRGS bit is not provided in the TX1CTL2 register.
Remarks 1. m = 1, 2
n = 0, 1
2. Capture trigger of 16-bit timer X0 : INTCMP2 or INTP0
Capture trigger of 16-bit timer X1 : INTCMP1