Datasheet

78K0/Ix2 CHAPTER 6 16-BIT TIMERS X0 AND X1
R01UH0010EJ0500 Rev.5.00 212
Feb 28, 2012
Figure 6-23. Example of Software Processing for A/D Conversion Start Timing Signal Output
START
<1> <2>
<1> Count operation start flow
<2> Count operation stop flow
Initial setting of these registers is performed before
setting the TXnTMC bit to 1.
Starts count operation
TXnTMC bit = 1
Register initial setting
TXnCTL2 register,
TXnCTL1 register,
TXnCRm register,
TXnCCR0 register
TXnTMC bit = 0
The counter is initialized and counting is stopped
by clearing the TXnTMC bit to 0.
STOP
16-bit timer counter Xn
N
10
0
N N N
A/D conversion synchronization trigger
Compare register
(TXnCRm)
Operable bits
(TXnTMC)
0000H
M
Compare register
(TXnCCR0)
Compare match interrupt
(INTTMXn)
M
M
M
Remarks 1. m = 1, 3
n = 0, 1
2. For details of A/D conversion in combination with 16 bit timer X0 or X1, refer to 11.4.2 Basic operation
of A/D converter (timer trigger mode).