Datasheet

78K0/Ix2 CHAPTER 6 16-BIT TIMERS X0 AND X1
R01UH0010EJ0500 Rev.5.00 191
Feb 28, 2012
Figure 6-5. Format of 16-bit timer Xn compare register m (TXnCRm)
TXnCRm
FF85H (TX0CR0), FF87H (TX0CR1),
FF8BH (TX0CR2), FF91H (TX0CR3),
FF9DH (TX1CR0), FFB1H (TX1CR1),
FFB3H (TX1CR2), FFB5H (TX1CR3),
FF84H (TX0CR0), FF86H (TX0CR1),
FF8AH (TX0CR2), FF90H (TX0CR3),
FF9CH (TX1CR0), FFB0H (TX1CR1),
FFB2H (TX1CR2), FFB4H (TX1CR3),
Address: FF84H, FF85H (TX0CR0), FF86H, FF87H (TX0CR1), FF8AH, FF8BH (TX0CR2), FF90H, FF91H (TX0CR3),
FF9CH, FF9DH (TX1CR0), FFB0H, FFB1H (TX1CR1), FFB2H, FFB3H (TX1CR2), FFB4H, FFB5H (TX1CR3)
After reset: 0000H R/W
1514131211109876543210
Remark n = 0, 1, m = 0 to 3
6.3 Registers Controlling 16-Bit Timers X0 and X1
Registers used to control the 16-Bit Timers X0 and X1 are shown below.
● 16-bit timer X0
 16-bit timer X0 operation control registers 0 to 4 (TX0CTL0 to TX0CTL4)
 16-bit timer X0 output control register 0 (TX0IOC0)
 Port mode register 3 (PM3)
 Port register 3 (P3)
● 16-bit timer X1
 16-bit timer X1 operation control registers 0 to 2, 4 (TX1CTL0 to TX1CTL2, TX1CTL4)
 16-bit timer X1 output control register 0 (TX1IOC0)
 Port mode register 3 (PM3)
 Port register 3 (P3)