Datasheet
78K0/Ix2 CHAPTER 5 CLOCK GENERATOR
R01UH0010EJ0500 Rev.5.00 177
Feb 28, 2012
(2) Example of setting procedure when using internal high-speed oscillation clock as CPU clock, and internal
high-speed oscillation clock or high-speed system clock as peripheral hardware clock
<1> Restarting oscillation of the internal high-speed oscillation clock
Note
(Refer to 5.6.2 (1) Example of setting procedure when restarting oscillation of the internal high-
speed oscillation clock).
Oscillating the high-speed system clock
Note
(This setting is required when using the high-speed system clock as the peripheral hardware clock. Refer
to 5.6.1 (1) Example of setting procedure when oscillating the X1 clock and (2) Example of setting
procedure when using the external main system clock.)
Note The setting of <1> is not necessary when the internal high-speed oscillation clock or high-speed
system clock is already operating.
<2> Selecting the clock supplied as the main system clock and peripheral hardware clock (MCM register)
Set the main system clock and peripheral hardware clock using XSEL and MCM0.
Selection of Main System Clock and Clock Supplied to Peripheral Hardware XSEL MCM0
Main System Clock (f
XP) Peripheral Hardware Clock (fPRS)
0 0
0 1
Internal high-speed oscillation clock
(f
IH)
1 0
Internal high-speed oscillation clock
(f
IH)
High-speed system clock (f
XH)
<3> Selecting the CPU clock division ratio (PCC register)
When CSS is cleared to 0, the main system clock is supplied to the CPU. To select the CPU clock division
ratio, use PCC0, PCC1, and PCC2.
CSS PCC2 PCC1 PCC0 CPU Clock (fCPU) Selection
0 0 0 fXP
0 0 1 fXP/2 (default)
0 1 0 fXP/2
2
0 1 1 fXP/2
3
1 0 0 fXP/2
4
0
Other than above Setting prohibited