Datasheet
78K0/Ix2 CHAPTER 5 CLOCK GENERATOR
R01UH0010EJ0500 Rev.5.00 170
Feb 28, 2012
5.5 Clock Generator Operation
The clock generator generates the following clocks and controls the operation modes of the CPU, such as standby
mode (refer to Figure 5-1).
Main system clock fXP
High-speed system clock f
XH
X1 clock fX
External main system clock f
EXCLK
Internal high-speed oscillation clock f
IH
Internal low-speed oscillation clock fIL
CPU clock f
CPU
Peripheral hardware clock f
PRS
TMX control clock fTMX
The CPU starts operation when the internal high-speed oscillator starts outputting after a reset release in the 78K0/Ix2
microcontrollers, thus enabling the following.
(1) Enhancement of security function
When the X1 clock is set as the CPU clock by the default setting, the device cannot operate if the X1 clock is
damaged or badly connected and therefore does not operate after reset is released. However, the start clock of the
CPU is the internal high-speed oscillation clock, so the device can be started by the internal high-speed oscillation
clock after a reset release. Consequently, the system can be safely shut down by performing a minimum operation,
such as acknowledging a reset source by software or performing safety processing when there is a malfunction.
(2) Improvement of performance
Because the CPU can be started without waiting for the X1 clock oscillation stabilization time, the total performance
can be improved.
When the power supply voltage is turned on, the clock generator operation is shown in Figures 5-12 and 5-13.