Datasheet

78K0/Ix2 CHAPTER 5 CLOCK GENERATOR
R01UH0010EJ0500 Rev.5.00 169
Feb 28, 2012
Here is an example when using PLL (flow chart).
Figure 5-11. Setting Example When Using PLL (Flow Chart)
(When Multiplying Internal High-Speed Oscillation Clock)
Waits for the accuracy of the internal
high-speed oscillation to stabilize.
Yes
No
RSTS = 1?
Sets a MCM register,
PCC register
Operation by multiplied clock of PLL
PLLON←1
Has PLL operation
stabilization time
(90 μs) elapsed?
Reset release
Not elapsed
Elapsed
SELPLL←1
Note
: Set to the PLL mode
: Starts to operate the PLL.
(Clock-through mode)
Note After starting to operate the PLL, check that the PLL operation stabilization time (90  s) has elapsed and then
set to PLL mode (SELPLL = 1).
Remark A 10
 s wait occurs as an internal stabilization wait time after PLLON = 1 is set.