Datasheet

78K0/Ix2 CHAPTER 5 CLOCK GENERATOR
R01UH0010EJ0500 Rev.5.00 160
Feb 28, 2012
The fastest instruction can be executed in 2 clocks of the CPU clock in the 78K0/Ix2 microcontrollers. Therefore, the
relationship between the CPU clock (f
CPU) and the minimum instruction execution time is as shown in Table 5-3.
Table 5-3. Relationship between CPU Clock and Minimum Instruction Execution Time
Minimum Instruction Execution Time: 2/fCPU
Main System Clock (fXP)
High-Speed System Clock (fXH)
Note 1
Internal High-Speed Oscillation Clock (fIH)
Note 1
CPU Clock (fCPU)
At 10 MHz
Operation
Note 2
At 20 MHz
Operation
Note 3
At 4 MHz (TYP.)
Operation
Note 4
At 20 MHz (TYP.)
Operation
Note 5
fXP 0.2  s 0.1  s 0.5  s (TYP.) 0.1  s (TYP.)
fXP/2 0.4  s 0.2  s 1.0  s (TYP.) 0.2  s (TYP.)
fXP/2
2
0.8  s 0.4  s 2.0  s (TYP.) 0.4  s (TYP.)
fXP/2
3
1.6  s 0.8  s 4.0  s (TYP.) 0.8  s (TYP.)
fXP/2
4
3.2  s 1.6  s 8.0  s (TYP.) 1.6  s (TYP.)
Notes 1. The main clock mode register (MCM) is used to set the main system clock supplied to CPU clock (high-
speed system clock/internal high-speed oscillation clock) (refer to Figure 5-6).
2. When using clock-through mode (during f
XP = fXH = 10 MHz operation)
3. When using PLL mode (during operation at f
XP = fXH5, fXH = 4 MHz)
4. When using clock-through mode (during fXP = fIH = 4 MHz (TYP.) operation)
5. When using PLL mode (during operation at f
XP = fIH5, fXP = fIH = 4 MHz (TYP.))
(3) Internal oscillation mode/PLL control register (RCM)
This register sets the operation mode of internal oscillator and controls the PLL function.
RCM can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 80H
Note 1
.