Datasheet

78K0/Ix2 CHAPTER 5 CLOCK GENERATOR
R01UH0010EJ0500 Rev.5.00 158
Feb 28, 2012
Remark fX: X1 clock oscillation frequency
f
IH: Internal high-speed oscillation clock frequency
f
EXCLK: External main system clock frequency
f
XH: High-speed system clock frequency
fXP: Main system clock frequency
f
IL: Internal low-speed oscillation clock frequency
f
CPU: CPU clock frequency
fPRS: Peripheral hardware clock frequency
f
TMX: TMX control clock frequency
5.3 Registers Controlling Clock Generator
The following seven registers are used to control the clock generator.
 Clock operation mode select register (OSCCTL)
 Processor clock control register (PCC)
 Internal oscillation mode/PLL control register (RCM)
 Main OSC control register (MOC)
 Main clock mode register (MCM)
 Oscillation stabilization time counter status register (OSTC)
 Oscillation stabilization time select register (OSTS)
(1) Clock operation mode select register (OSCCTL)
This register selects the operation modes of the high-speed system.
OSCCTL can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.