Datasheet

78K0/Ix2 CHAPTER 4 PORT FUNCTIONS
R01UH0010EJ0500 Rev.5.00 152
Feb 28, 2012
Table 4-16. Settings of Port Mode Register and Output Latch When Using Alternate Function (78K0/IB2 (32 pins)) (1/2)
Alternate Function Pin Name
Function Name I/O
PM P
TI000 Input 1
INTP0 Input 1
<TOH1> Output 0 0
P00
<TI51> Input 1
SSI11 Input 1
P02
INTP5 Input 1
ANI0
Note 1
Input 1
P20
AMP-
Notes 1, 2
Input 1
ANI1
Note 3
Input 1
AMPOUT
Notes 2, 3
Output 1
P21
PGAIN
Notes 2, 3
Input 1
ANI2
Note 1
Input 1
P22
AMP+
Notes 1, 2
Input 1
ANI3
Note 4
Input 1
P23
CMP2+
Note 4
Input 1
ANI4
Note 4
Input 1
P24
CMP0+
Note 4
Input 1
ANI5
Note 4
Input 1
P25
CMP1+
Note 4
Input 1
ANI6
Note 5
Input 1
P26
CMPCOM
Note 5
Input 1
P27 ANI7
Note 6
Input 1
Notes 1. The pin function can be selected by using ADPC0 register, PM2 register, ADS register, and OPAMP0E bit.
Refer to Table 4-7 in 4.2.2 Port 2.
2.
PD 78F0755, 78F0756 (products with operational amplifier) only
3. The pin function can be selected by using ADPC0 register, PM2 register, ADS register, OPAMP0E bit, and
PGAEN bit. Refer to Table 4-8 in 4.2.2 Port 2.
4. The pin function can be selected by using ADPC0 register, PM2 register, ADS register, and CMPmEN (m =
0-2) bit. Refer to Table 4-9 in 4.2.2 Port 2.
5. The pin function can be selected by using ADPC0 register, PM2 register, ADS register, and CmMODSEL1,
CmMODSEL0 (m = 0-2) bit. Refer to Table 4-10 in 4.2.2 Port 2.
6. The pin function can be selected by using ADPC0 register, PM2 register, and ADS register. Refer to Table
4-11 in 4.2.2 Port 2.
Remark : Don’t care
PM: Port mode register
P: Port output latch