Datasheet
78K0/Ix2 CHAPTER 4 PORT FUNCTIONS
R01UH0010EJ0500 Rev.5.00 141
Feb 28, 2012
(5) Port output mode register 6 (POM6)
Note
This register sets the output mode of P60 and P61 in 1-bit units.
During I
2
C communication, set POM60 and POM61 to 1.
When using the P60/TxD6/SCLA0 pin as the data output of serial interface UART6/DALI, clear POM60 to 0.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Note 78K0/IA2, 78K0/IB2 only
Figure 4-35. Format of Port Output Mode Register 6 (POM6) (78K0/IA2, 78K0/IB2 only)
Address: FF2AH After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
POM6 0 0 0 0 0 0 POM61 POM60
POM6n P6n pin output mode selection (n = 0, 1)
0 Normal output (CMOS output) mode
1 N-ch open drain output (VDD tolerance) mode
(6) Reset pin mode register (RSTMASK)
This register sets the pin function of RESET/P125 (external reset input/input-dedicated port).
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 4-36. Format of Reset Pin Mode Register (RSTMASK)
Address: FF2DH After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
RSTMASK 0 0 RSTM 0 0 0 0 0
RSTM RESET/P125 pin function selection
0 Using as external reset input (RESET)
1 Using as input-dedicated port (P125)
(7) A/D port configuration registers 0, 1
Note
(ADPC0, ADPC1
Note
)
ADPC0 switches the P20/AMP-/ANI0 to P27/ANI7 pins to digital I/O or analog input of port. Each bit of ADPC0
corresponds to a pin of port 2 and can be specified in 1-bit units.
ADPC1 switches the P70/ANI8 pins to digital I/O or analog input of port and can be specified in 1-bit units.
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears ADPC0 and ADPC1 to 00H.
Note 78K0/IB2 only