Datasheet

78K0/Ix2 CHAPTER 3 CPU ARCHITECTURE
R01UH0010EJ0500 Rev.5.00 94
Feb 28, 2012
3.4.7 Based addressing
[Func
tion]
8-bit immediate data is added as offset data to the contents of the base register, that is, the HL register pair in the
register bank specified by the register bank select flag (RBS0 and RBS1), and the sum is used to address the memory.
Addition is performed by expanding the offset data as a positive number to 16 bits. A carry from the 16th bit is ignored.
This addressing can be carried out for all of the memory spaces.
[Operand format]
Identifier Description

[HL + byte]
[Description example]
MOV A, [HL + 10H]; when setting byte to 10H
Operation code 10101110
00010000
[Illustration]
16 08
H
7
L
07
7 0
A
HL
The contents of the memory
addressed are transferred.
Memory
+10