Datasheet

78K0/Kx2-L APPENDIX C REVISION HISTORY
R01UH0028EJ0400 Rev.4.00 802
Sep 27, 2010
(5/8)
Edition Description Chapter
Modification of Caution in Figure 17-14 Format of Priority Specification Flag Registers
(PR0L, PR0H, PR1L, PR1H) (78K0/KB2-L) to Figure 17-16 Format of Priority
Specification Flag Registers (PR0L, PR0H, PR1L, PR1H) (48-pin products of
78K0/KC2-L)
Addition of reset current (IDDrst)
(1) A/D Converter in Analog Characteristics
Modification of conversion time (t
CONV) in <1> ANI0 to ANI7
Addition of <2> ANI8 to ANI10 (78K0/KB2-L and 78K0/KC2-L only)
(3) Operational amplifier 0 in Analog Characteristics
Modification of V
DD range
Addition of phase margin and large-amplitude voltage gain (AV
OP0)
Modification of gain-bandwidth product (GBW
OP0)
(4) Operational amplifier 1 in Analog Characteristics
Addition of phase margin and large-amplitude voltage gain (AV
OP1)
Modification of gain-bandwidth product (GBW
OP1)
(7) LVI in Analog Characteristics
Addition of supply voltage level (V
LVI14) and supply voltage when power supply voltage is
turned on (V
DDLVI)
Flash Memory Programming Characteristics
Modification of V
DD range
Modification of system clock frequency (f
CLK)
Modification of Number of rewrites per chip (C
erwr)
Addition of Note 1
CHAPTER 28
ELECTRICAL
SPECIFICATIONS
(TARGET VALUES)
Modification of 29.1 78K0/KY2-L
CHAPTER 29
PACKAGE
DRAWINGS
Addition of preliminary
CHAPTER 30
RECOMMENDED
SOLDERING
CONDITIONS
(PRELIMINARY)
Modification of URL of download site for development tools
APPENDIX A
DEVELOPMENT
TOOLS
Addition of chapter
APPENDIX B
REGISTER INDEX
2nd Edition
Addition of chapter
APPENDIX C
REVISION HISTORY
Remark “Classification” in the above table classifies revisions as follows.
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note, (d):
Addition/change of package, part number, or management division, (e): Addition/change of related
documents