Datasheet

78K0/Kx2-L APPENDIX C REVISION HISTORY
R01UH0028EJ0400 Rev.4.00 796
Sep 27, 2010
(3/4)
Page Description Classification
CHAPTER 12 A/D CONVERTER
p.421 Change of Table 12-8. Setting Functions of P70/ANI8 to P72/ANI10 Pins (d)
p.433 Change of mode name in Table 12-9. Resistance and Capacitance Values of Equivalent Circuit
(Reference Values)
(c)
CHAPTER 13 OPERATIONAL AMPLIFIERS
p.435 Change of Figure 13-1. Block Diagram of Operational Amplifier (c)
p.439 Change of Figure 13-6. Format of Analog Input Channel Specification Register (ADS) (c)
p.444 Change of Table 13-5. Setting Functions of P21/ANI1/AMP0OUT/PGAIN Pin (c)
CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
p.573 Change of (4) Port mode registers 0, 1, 3, 4, 6, 12 (PM0, PM1, PM3, PM4, PM6, PM12)
in 16.3 Registers Controlling Serial Interfaces CSI10 and CSI11
(d)
p.574 Addition of Figure 16-9. Format of Port Mode Register 0 (PM0) (d)
p.574 Addition of Figure 16-11. Format of Port Mode Register 3 (PM3) (d)
CHAPTER 17 INTERRUPT FUNCTIONS
pp.592, 593 Change of Table 17-1. Interrupt Source List (d)
CHAPTER 19 STANDBY FUNCTION
p.649 Addition of Caution in Table 19-3. Operating Statuses in STOP Mode (c)
CHAPTER 20 RESET FUNCTION
pp.662, 663 Change of Note in Table 20-2. Hardware Statuses After Reset Acknowledgment (b)
p.664 Change of Table 20-3. RESF Status When Reset Request Is Generated (b)
CHAPTER 21 POWER-ON-CLEAR CIRCUIT
p.668 Change of Figure 21-2. Timing of Generation of Internal Reset Signal by Power-on-Clear Circuit
and Low-Voltage Detector (2/2)
(b)
CHAPTER 22 LOW-VOLTAGE DETECTOR
p.673 Change of Note 1 in Figure 22-2. Format of Low-Voltage Detection Register (LVIM) (b)
p.675 Change of Note in Figure 22-3. Format of Low-Voltage Detection Level Select Register (LVIS) (b)
p.676 Change of Remark 1 in 22.4 (1) Used as reset (LVIMD = 1) (b)
p.680 Change of description in 22.4.1 (1) (b) When LVI default start function enabled is set (LVISTART =
1)
(b)
p.680 Change of Figure 22-6. Timing of Low-Voltage Detector Internal Reset Signal Generation (Bit:
LVISEL = 0, Option Byte: LVISTART = 1)
(b)
p.685 Change of description in 22.4.2 (1) (b) When LVI default start function enabled is set (LVISTART =
1)
(b)
p.685 Change of Figure 22-9. Timing of Low-Voltage Detector Interrupt Signal Generation (Bit: LVISEL
= 0, Option Byte: LVISTART = 1)
(b)
CHAPTER 23 REGULATOR
p.691 Change of (1) Regulator mode control register (RMC) in 23.2 Register Controlling Regulator (b)
CHAPTER 24 OPTION BYTE
p.694 Change of (4) 0083H/1083H in 24.1 Functions of Option Bytes (b)
p.696 Change of description of LVISTART bit in Figure 24-1. Format of Option Byte (2/3) (b)
p.697 Change of Figure 24-1. Format of Option Byte (3/3) (b)
p.698 Change of description example of software in 24.2 Format of Option Byte (b)
Remark “Classification” in the above table classifies revisions as follows.
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note, (d):
Addition/change of package, part number, or management division, (e): Addition/change of related
documents