Datasheet

78K0/Kx2-L CHAPTER 2 PIN FUNCTIONS
R01UH0028EJ0400 Rev.4.00 59
Sep 27, 2010
Table 2-6. Pin I/O Circuit Types (78K0/KC2-L) (2/2)
Pin Name I/O Circuit Type I/O Recommended Connection of Unused Pins
P60/SCLA0/SCK11/INTP11
P61/SDAA0/SI11/INTP10
5-AS
P62/SO11/INTP9
P63
Note 3
/INTP8
Note 3
5-AR
Input: Independently connect to V
DD or VSS via a resistor.
Output: Leave this pin open at low-level output after clearing
the output latch of the port to 0.
P70/KR0
P71/KR1
P72/KR2
P73/KR3
P74
Note 1
/KR4
Note 1
P75
Note 1
/KR5
Note 1
Input: Independently connect to V
DD or VSS via a resistor.
Output: Leave open.
P120/EXLVI/INTP0
(/SO11)
Note 3
5-AQ
I/O
P121/X1/TOOLC0
Note 2
P122/X2/EXCLK/
TOOLD0
Note 2
P123/XT1
Note 2
P124/XT2/EXCLKS
Note 2
37-A Input
Independently connect to V
DD or VSS via a resistor.
RESET/P125 42-A Input Connect directly to VDD or via a resistor.
AVREF
− −
Connect directly to VDD.
Note 4
AVSS
− −
Connect directly to VSS.
Notes 1. 48-pin products only
2. Use recommended connection above in input port mode (refer to Figure 5-4 Format of Clock Operation
Mode Select Register (OSCCTL)) when these pins are not used.
3. 44-pin and 48-pin products only
4. When port 2 is used as the digital port pins, make AV
REF the same potential as VDD.
Caution Because RESET/P125 is set in the external reset input immediately after release of reset, if a reset signal
is generated during low level input, the reset status continues until the input rises to the high level.
Remark Functions in parentheses ( ) in the table above can be assigned by setting the port alternate switch control
register (MUXSEL).
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