Datasheet

78K0/Kx2-L CHAPTER 25 FLASH MEMORY
R01UH0028EJ0400 Rev.4.00 710
Sep 27, 2010
Table 25-9. Processing Time for Each Command When PG-FP5 Is Used (Reference) (2/3)
(1) 78K0/KY2-L, 78K0/KA2-L (2/2)
(c) Products with internal ROMs of the 16 KB: μPD78F0552, 78F0557, 78F0562, 78F0567
Command of PG-FP5 Port: UART-Internal-OSC (Internal high-speed oscillation clock (fIH: 8 MHz (typ.)),
Speed: 500,000 bps
Signature 0.5 s (typ.)
Blankcheck 0.5 s (typ.)
Erase 1 s (typ.)
Program 2.5 s (typ.)
Verify 1.5 s (typ.)
E.P.V 2.5 s (typ.)
Checksum 1 s (typ.)
Security 0.5 s (typ.)
(2) 78K0/KB2-L, 78K0/KC2-L (1/2)
(a) Products with internal ROMs of the 8 KB: μPD78F0571, 78F0576, 78F0581, 78F0586
Command of PG-FP5 Port: UART-Internal-OSC (Internal high-speed oscillation clock (fIH: 8 MHz (typ.)),
Speed: 500,000 bps
Signature 0.5 s (typ.)
Blankcheck 1 s (typ.)
Erase 1 s (typ.)
Program 1.5 s (typ.)
Verify 1 s (typ.)
E.P.V 1.5 s (typ.)
Checksum 1 s (typ.)
Security 1 s (typ.)
Caution When executing boot swapping, do not use the E.P.V. command with the dedicated flash memory
programmer.