Datasheet

78K0/Kx2-L CHAPTER 22 LOW-VOLTAGE DETECTOR
R01UH0028EJ0400 Rev.4.00 674
Sep 27, 2010
Cautions 1. To stop LVI, follow either of the procedures below.
• When using 8-bit memory manipulation instruction: Write 00H to LVIM.
• When using 1-bit memory manipulation instruction: Clear LVION to 0.
2. Input voltage from external input pin (EXLVI) must be EXLVI < V
DD.
3. If LVI operation is disabled (clears LVION) when LVI is used in interrupt mode (LVIMD = 0),
LVISEL is set to 0, and the supply voltage (V
DD) is less than or equal to the detection voltage
(V
LVI), or when LVI is used in interrupt mode (LVIMD = 0), LVISEL is set to 1, and input voltage of
external input pin (EXLVI) is less than or equal to the detection voltage (VEXLVI)), an interrupt
request signal (INTLVI) is generated and LVIIF may be set to 1.
4. For 78K0/KY2-L and 78K0/KA2-L, be sure to clear bit 2 to 0.