Datasheet

78K0/Kx2-L CHAPTER 20 RESET FUNCTION
R01UH0028EJ0400 Rev.4.00 662
Sep 27, 2010
Table 20-2. Hardware Statuses After Reset Acknowledgment (3/4)
Hardware
Status After Reset
Acknowledgment
Note 1
Clock output controller Clock output selection register (CKS) 00H
Watchdog timer
Enable register (WDTE) 1AH/9AH
Note 2
10-bit A/D conversion result register (ADCR) 0000H
8-bit A/D conversion result register L (ADCRL) 00H
8-bit A/D conversion result register H (ADCRH) 00H
Mode register 0 (ADM0) 00H
Analog input channel specification register (ADS) 00H
A/D port configuration register 0 (ADPC0) 00H
A/D converter
A/D port configuration register 1 (ADPC1) 07H
Note 3
Operational amplifier 0
(AMP0, PGA)
Operational amplifier 0 control register (AMP0M) 00H
Operational amplifier 1
(AMP1)
Operational amplifier 1 control register (AMP1M) 00H
Receive buffer register 6 (RXB6) FFH
Transmit buffer register 6 (TXB6) FFH
Asynchronous serial interface operation mode register 6 (ASIM6) 01H
Asynchronous serial interface reception error status register 6 (ASIS6) 00H
Asynchronous serial interface transmission status register 6 (ASIF6) 00H
Clock selection register 6 (CKSR6) 00H
Baud rate generator control register 6 (BRGC6) FFH
Asynchronous serial interface control register 6 (ASICL6) 16H
Serial interface UART6
Input switch control register (ISC) 00H
Transmit buffer registers 10, 11 (SOTB10, SOTB11) 00H
Serial I/O shift registers 10, 11 (SIO10, SIO11) 00H
Serial operation mode registers 10, 11 (CSIM10, CSIM11) 00H
Serial interfaces CSI10,
CSI11
Serial clock selection registers 10, 11 (CSIC10, CSIC11) 00H
Shift register (IICA) 00H
Status register 0 (IICS0) 00H
Flag register 0 (IICF0) 00H
Control register 0 (IICCTL0) 00H
Control register 1 (IICCTL1) 00H
Low-level width setting register (IICWL) FFH
High-level width setting register (IICWH) FFH
Serial interface IICA
Slave address register 0 (SVA0) 00H
Key interrupt Key return mode register (KRM) 00H
Notes 1. During reset signal generation or oscillation stabilization time wait, only the PC contents among the hardware
statuses become undefined. All other hardware statuses remain unchanged after reset.
2. The reset value of WDTE is determined by the option byte setting.
3. For the 78K0/KA2-L (32-pin products), cleared to 00H.
Remark The special function registers (SFRs) mounted depend on the product. Refer to 3.2.3 Special function
registers (SFRs).
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