Datasheet

78K0/Kx2-L CHAPTER 19 STANDBY FUNCTION
R01UH0028EJ0400 Rev.4.00 643
Sep 27, 2010
Table 19-1. Operating Statuses in HALT Mode (1/2)
When HALT Instruction Is Executed While CPU Is Operating on Main System Clock HALT Mode Setting
Item
When CPU Is Operating on
Internal High-Speed
Oscillation Clock (f
IH)
When CPU Is Operating on
X1 Clock (f
X)
When CPU Is Operating on
External Main System Clock
(f
EXCLK)
System clock Clock supply to the CPU is stopped
fIH Operation continues (cannot
be stopped)
Status before HALT mode was set is retained
fX Status before HALT mode
was set is retained
Operation continues (cannot
be stopped)
Status before HALT mode
was set is retained
Main system clock
fEXCLK Operates or stops by external clock input Operation continues (cannot
be stopped)
fXT Status before HALT mode was set is retained
Subsystem clock
fEXCLKS Operates or stops by external clock input
fIL Status before HALT mode was set is retained
CPU
Flash memory
Operation stopped
RAM
Port (latch)
Status before HALT mode was set is retained
16-bit timer/event counter 00
50 8-bit timer/event
counter
51
H0 8-bit timer
H1
Real-time counter (RTC)
Operable
Watchdog timer Operable. Clock supply to watchdog timer stops when “internal low-speed oscillator can be
stopped by software” is set by option byte.
Clock output
A/D converter
Operational amplifiers 0, 1
UART6
CSI10
CSI11
Serial interface
IICA
Key interrupt
Power-on-clear function
Low-voltage detection function
External interrupt
Operable
Remarks 1. f
IH: Internal high-speed oscillation clock, fX: X1 clock
fEXCLK: External main system clock, fXT: XT1 clock
f
EXCLKS: External subsystem clock, fIL: Internal low-speed oscillation clock
2. The functions mounted depend on the product. Refer to 1.4 Block Diagram and 1.5 Outline of
Functions.