Datasheet

78K0/Kx2-L CHAPTER 17 INTERRUPT FUNCTIONS
R01UH0028EJ0400 Rev.4.00 593
Sep 27, 2010
Table 17-1. Interrupt Source List (2/2)
Interrupt Source
KY2
-L
KA2-L
KB2
-L
KC2-L
Interrupt
Type
Internal/
External
Basic
Configuration
Type
Note 1
Default
Priority
Note 2
Name Trigger
Vector
Table
Address
16
pins
20
pins
25,
32
pins
30
pins
40
pins
44
pins
48
pins
External (C) 20 INTKR Key interrupt detection 002CH
− − − − √ √ √
Internal (A) 21 INTRTC
Fixed-cycle signal of real-time
counter/alarm match detection
002EH
− − − − √ √ √
22 INTP7 0030H
− − − − − − √
External (B)
23 INTP8
Pin input edge detection
0032H
− − − − − √ √
24 INTIICA0 End of IICA communication 0034H
√ √ √ √ √ √ √
Internal (A)
25 INTCSI11 End of CSI11 communication 0036H
− − − − √ √ √
26 INTP9 0038H
− − − − √ √ √
27 INTP10 003AH
− − − √ √ √ √
Maskable
External (B)
28 INTP11
Pin input edge detection
003CH
− − − √ √ √ √
Software
−
(D)
−
BRK BRK instruction execution 003EH
√ √ √ √ √ √ √
RESET Reset input
POC Power-on clear
LVI Low-voltage detection
Note 3
Reset
− − −
WDT WDT overflow
0000H
√ √ √ √ √ √ √
Notes 1. Basic configuration types (A) to (D) correspond to (A) to (D) in Figure 17-1.
2. The default priority determines the sequence of processing vectored interrupts if two or more maskable
interrupts occur simultaneously. Zero indicates the highest priority and 28 indicates the lowest priority.
3. When bit 1 (LVIMD) of the low-voltage detection register (LVIM) is set to 1.
<R>