Datasheet

78K0/Kx2-L CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
R01UH0028EJ0400 Rev.4.00 586
Sep 27, 2010
(3) Timing of output to SO1n pin (first bit)
When communication is started, the value of transmit buffer register 1n (SOTB1n) is output from the SO1n pin. The
output operation of the first bit at this time is described below.
Figure 16-17. Output Operation of First Bit (1/2)
(a) Type 1: CKP1n = 0, DAP1n = 0
SCK1n
SOTB1n
SIO1n
SO1n
Writing to SOTB1n or
reading from SIO1n
First bit 2nd bit
Output latch
(b) Type 3: CKP1n = 1, DAP1n = 0
SCK1n
SOTB1n
SIO1n
Output latch
SO1n
Writing to SOTB1n or
reading from SIO1n
First bit 2nd bit
The first bit is directly latched by the SOTB1n register to the output latch at the falling (or rising) edge of SCK1n, and
output from the SO1n pin via an output selector. Then, the value of the SOTB1n register is transferred to the SIO1n
register at the next rising (or falling) edge of SCK1n, and shifted one bit. At the same time, the first bit of the receive
data is stored in the SIO1n register via the SI1n pin.
The second and subsequent bits are latched by the SIO1n register to the output latch at the next falling (or rising)
edge of SCK1n, and the data is output from the SO1n pin.
Remark 78K0/KA2-L (25, 32-pin products): n = 1
78K0/KB2-L: n = 0
78K0/KC2-L: n = 0, 1