Datasheet

78K0/Kx2-L CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
R01UH0028EJ0400 Rev.4.00 572
Sep 27, 2010
Cautions 1. Do not write to CSIC11 while CSIE11 = 1 (operation enabled).
2. To use P62/SO11 and P60/SCK11/SCLA0 as general-purpose ports when CSISEL = 0, set CSIC11
in the default status (00H).
To use P120/SO11/INTP0/EXLVI and P40/SCK11/RTCCL/RTCDIV as general-purpose ports when
CSISEL = 1, set CSIC11 in the default status (00H).
To use P37/SO11, P35/SCK11, and P02/SSI11/INTP5 as general-purpose ports, set CSIM11 in the
default status (00H).
3. The phase type of the data clock is type 1 after reset.
Remark f
PRS: Peripheral hardware clock frequency
(3) Port alternate switch control register (MUXSEL) (78K0/KC2-L (44, 48-pin products) only)
This register assigns the pin function to be used with serial interface CSI11. SCK11 is assigned to P60, SI11 to P61,
and SO11 to P62 by default.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears MUXSEL to 00H.
Figure 16-8. Format of Port Alternate Switch Control Register (MUXSEL)
(78K0/KC2-L (44, 48-pin products))
Address: FF3FH After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
MUXSEL 0 0 0 0 0 CSISEL 0 0
CSISEL Pin function assignment to be used with serial interface CSI11
0 SCK11/P60, SI11/P61, SO11/P62
1 SCK11/P40, SI11/P41, SO11/P120