Datasheet

78K0/Kx2-L CHAPTER 13 OPERATIONAL AMPLIFIERS
R01UH0028EJ0400 Rev.4.00 440
Sep 27, 2010
Caution 3. Set ADS after PGA operation setting when selecting the PGA output signal as analog input. Set
ADS after single AMP operation setting when selecting the operational amplifier output signal as
analog input.
(4) Port mode registers 1, 2 (PM1, PM2)
When using AMP0-/ANI0/P20, AMP0OUT/PGAIN/ANI1/P21, and AMP0+/ANI2/P22 pins for the operational amplifier
0, set PM20 to PM22 to 1.
When using AMP1-/ANI8/P10, AMP1OUT/ANI9/P11, and AMP1+/ANI10/P12 pins for the operational amplifier 1, set
PM10 to PM12 to 1.
The output latches of P20 to P22 and P10 to P12 at this time may be 0 or 1.
If PM20 to PM22 and PM10 to PM12 are set to 0, they cannot be used as the operational amplifier 0 and 1 pins.
PM1 and PM2 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets these registers to FFH.
Figure 13-7. Format of Port Mode Register 1 (PM1)
PM10PM11PM12PM13PM14PM15PM16PM17
P1n pin I/O mode selection (n = 0 to 7)
Output mode (output buffer on)
Input mode (output buffer off)
PM1n
0
1
01234567
PM1
Address: FF21H After reset: FFH R/W
Symbol
Remark The figure shown above presents the format of port mode register 1 of the 78K0/KB2-L and
78K0/KC2-L.