Datasheet

78K0/Kx2-L CHAPTER 12 A/D CONVERTER
R01UH0028EJ0400 Rev.4.00 430
Sep 27, 2010
12.6 Cautions for A/D Converter
(1) Operating current in STOP mode
To satisfy the DC characteristics of the power supply current in STOP mode, clear bits 7 (ADCS) and 0 (ADCE) of A/D
converter mode register 0 (ADM0) to 0 before executing a STOP instruction.
To restart from the standby status, clear bit 0 (ADIF) of interrupt request flag register 1L (IF1L) to 0 and start
operation.
(2) Input range of ANI0 to ANI10
Observe the rated range of the ANI0 to ANI10 input voltage. If a voltage of AV
REF or higher and AVSS or lower (even
in the range of absolute maximum ratings) is input to an analog input channel, the converted value of that channel
becomes undefined. In addition, the converted values of the other channels may also be affected.
(3) Conflicting operations
<1> Conflict between A/D conversion result register (ADCR, ADCRL, ADCRH) write and ADCR, ADCRL, or ADCRH
read by instruction upon the end of conversion
ADCR, ADCRL, or ADCRH read has priority. After the read operation, the new conversion result is written to
ADCR, ADCRL, or ADCRH.
<2> Conflict between ADCR, ADCRL, or ADCRH write and A/D converter mode register 0 (ADM0) write, analog
input channel specification register (ADS), or A/D port configuration registers 0, 1 (ADPC0, ADPC1) write upon
the end of conversion
ADM0, ADS, ADPC0, or ADPC1 write has priority. ADCR, ADCRL, or ADCRH write is not performed, nor is the
conversion end interrupt signal (INTAD) generated.
(4) Noise countermeasures
To maintain the 10-bit resolution, attention must be paid to noise input to the AV
REF pin and pins ANI0 to ANI10.
<1> Connect a capacitor with a low equivalent resistance and a good frequency response to the power supply.
<2> The higher the output impedance of the analog input source, the greater the influence. To reduce the noise,
connecting external C as shown in Figure 12-22 is recommended.
<3> Do not switch these pins with other pins during conversion.
<4> The accuracy is improved if the HALT mode is set immediately after the start of conversion.