Datasheet

78K0/Kx2-L CHAPTER 12 A/D CONVERTER
R01UH0028EJ0400 Rev.4.00 423
Sep 27, 2010
Cautions 1. Make sure the period of <2> to <6> is 1 μ s or more.
2. If the timing of <2> is earlier than that of <4>, <2> may be performed any time.
Remark Three types of A/D conversion result registers are available.
• ADCR (16 bits): Store 10-bit A/D conversion value
• ADCRH (8 bits): Store the higher 8-bit A/D conversion value
• ADCRL (8 bits): Store the lower 8-bit A/D conversion value
Figure 12-13. Basic Operation of A/D Converter
Sampling time
Sampling
A/D conversion
Undefined
Conversion
result
Conversion
result
A/D converter
operation
Conversion time
SAR
INTAD
ADCS
ADCR,
ADCRL,
ADCRH
A/D conversion operations are performed continuously until bit 7 (ADCS) of the A/D converter mode register 0 (ADM0)
is reset (0) by software.
If a write operation is performed to the analog input channel specification register (ADS) during an A/D conversion
operation, the conversion operation is initialized, and if the ADCS bit is set (1), conversion starts again from the beginning.
Reset signal generation clears the A/D conversion result register (ADCR, ADCRH, ADCRL) to 0000H or 00H.