Datasheet

78K0/Kx2-L CHAPTER 12 A/D CONVERTER
R01UH0028EJ0400 Rev.4.00 415
Sep 27, 2010
Figure 12-9. Format of A/D Port Configuration Registers 0, 1 (ADPC0, ADPC1) (3/3)
(g) 78K0/KC2-L (44-pin and 48-pin products)
Address: FF2EH After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
ADPC0 ADPCS7 ADPCS6 ADPCS5 ADPCS4 ADPCS3 ADPCS2 ADPCS1 ADPCS0
Address: FF2FH After reset: 07H R/W
Symbol 7 6 5 4 3 2 1 0
ADPC1 0 0 0 0 0 ADPCS10 ADPCS9 ADPCS8
ADPCSn Digital I/O or analog I/O selection (n = 0 to 10)
0 Analog I/O
1 Digital I/O
Cautions 1. Set the pin set to analog I/O to the input mode by using port mode registers 1, 2, 7 (PM1, PM2,
PM7).
2. If data is written to ADPC0 and ADPC1, a wait cycle is generated. Do not write data to ADPC0 and
ADPC1 when the peripheral hardware clock is stopped. For details, refer to CHAPTER 31
CAUTIONS FOR WAIT.
(7) Port mode registers 1, 2, 7 (PM1, PM2, PM7)
When using the ANI8/AMP1-/P10 to ANI10/AMP1+/P12, ANI0/AMP0-/P20 to ANI7/P27, and ANI8/P70 to ANI10/P72
pins for analog input port, set PM10 to PM12, PM20 to PM27, PM70 to PM72 to 1.
The output latches of P10 to P12,
P20 to P27, and P70 to P72 at this time may be 0 or 1.
If PM10 to PM12, PM20 to PM27, and P70 to P72 are set to 0, they cannot be used as analog input port pins.
PM1, PM2, and PM7 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to FFH.
Remark A/D converter analog input pins differ depending on products.
• 78K0/KY2-L: ANI0 to ANI3
• 78K0/KA2-L (20-pin products): ANI0 to ANI5
• 78K0/KA2-L (25-pin products): ANI0 to ANI6
• 78K0/KA2-L (32-pin products): ANI0 to ANI10
• 78K0/KB2-L: ANI0 to ANI3, ANI8 to ANI10
• 78K0/KC2-L (40-pin product): ANI0 to ANI6, ANI8 to ANI10
• 78K0/KC2-L (44-pin and 48-pin products): ANI0 to ANI10
<R>
<R>