Datasheet

78K0/Kx2-L CHAPTER 12 A/D CONVERTER
R01UH0028EJ0400 Rev.4.00 409
Sep 27, 2010
Table 12-2. A/D Conversion Time Selection (3/3)
(3) 1.8 V ≤ AVREF < 2.7 V
A/D Converter Mode Register 0
(ADM0)
Conversion Time Selection
FR2 FR1 FR0 LV1 LV0
Mode
fPRS = 4 MHz fPRS = 8 MHz fPRS = 10 MHz
Conversion
Clock (fAD)
0 0 0 528/fPRS
Setting
prohibited
66.0
μ s 52.8 μ s fPRS/12
0 0 1 352/fPRS
Setting
prohibited
44.0
μ s
Setting
prohibited
f
PRS/8
0 1 0 264/fPRS 66.0 μ s Setting prohibited fPRS/6
0 1 1 176/fPRS 44.0 μ s Setting prohibited fPRS/4
1 0 0 132/fPRS Setting prohibited fPRS/3
1 0 1 88/fPRS Setting prohibited fPRS/2
1 1 0 66/fPRS Setting prohibited fPRS/1.5
1 1 1
0 1 Low-voltage
44/fPRS Setting prohibited fPRS
Other than above Setting prohibited
Cautions 1. When rewriting FR2 to FR0, LV1, and LV0 to other than the same data, stop A/D conversion once
(ADCS = 0) beforehand.
2. The above conversion time does not include clock frequency errors. Select conversion time,
taking clock frequency errors into consideration.
Remark f
PRS: Peripheral hardware clock frequency