Datasheet

78K0/Kx2-L CHAPTER 1 OUTLINE
R01UH0028EJ0400 Rev.4.00 23
Sep 27, 2010
1.4.4 78K0/KC2-L
PORT 0
P00, P01, P02
Note 1
PORT 2
P20 to P26, P27
Note 3
8
PORT 3
P30 to P33
POWER ON CLEAR/
LOW VOLTAGE
INDICATOR
POC/LVI
CONTROL
RESET CONTROL
PORT 6
P60 to P62, P63
Note 3
4
P121 to P125
5
PORT 12
SYSTEM
CONTROL
RESET/P125
X1/P121
X2/EXCLK/P122
11
A/D CONVERTER
AVREF
SERIAL
INTERFACE IICA
SDAA0/P61
SCLA0/P60
INTERNAL
HIGH-SPEED
RAM
78K/0
CPU
CORE
FLASH
MEMORY
8-bit TIMER H1
TOH1/P16
WATCHDOG TIMER
16-bit TIMER/
EVENT COUNTER 00
TI000/P00
RxD6/P14 <LINSEL>
RxD6/P14
TxD6/P13
SERIAL
INTERFACE UART6
LINSEL
ON-CHIP DEBUG
INTERNAL
HIGH-SPEED
OSCILLATOR
INTERNAL
LOW-SPEED
OSCILLATOR
OPERATIONAL
AMPLIFIER 0
Note 2
AMP0+
Note 2
/P22
AMP0-
Note 2
/P20
AMP0OUT
Note 2
/PGAIN
Note 2
/P21
3
4
ANI0/P20 to ANI7/P27
Note 3
,
ANI8/P10 to ANI10/P12
TOOLC0/X1, TOOLC1/P31
TOOLD0/X2, TOOLD1/P32
TO00/TI010/P01
11
EXLVI/P120
PORT 1
P10 to P17
8
VOLTAGE
REGULATOR
REGC
8-bit TIMER/
EVENT COUNTER 50
TI50/TO50/P17
8-bit TIMER/
EVENT COUNTER 51
TI51/TO51/P33
8-bit TIMER
H0
TOH0/P15
SERIAL
INTERFACE CSI10
SCK10/P10
SO10/P12
SI10/P11
AVSS
OPERATIONAL
AMPLIFIER 1
Note 2
AMP1+
Note 2
/P12
AMP1-
Note 2
/P10
AMP1OUT
Note 2
/P11
PORT 4
3
P40, P41, P42
Note 1
3
PORT 7
P70 to P73, P74
Note 1
, P75
Note 1
6
XT1/P123
XT2/EXCLKS/P124
SERIAL
INTERFACE CSI11
SCK11/P60
SO11/P62
SI11/P61
SSI11
Note 1
/P42
Note 1
PCL
Note 1
/P42
Note 1
CLOCK OUTPUT
CONTROL
Note 1
KEY RETURN
KR0 to KR3, KR4
Note 1
, KR5
Note 1
6
REALTIME
COUNTER
RTCCL
Note 3
/RTCDIV
Note 3
/P40
Note 3
RTC1HZ
Note 3
/P41
Note 3
P120
IC
(SCK11/) P40
(SI11/) P41
(SO11/) P120
INTERRUPT
CONTROL
INTP0/P120
RxD6/P14<LINSEL>
INTP1/P30 to INTP4/P33,
INTP5/P16,
INTP6
Note 1
/P42
Note 1
, INTP7
Note 1
/P02
Note 1
,
INTP8/P63
Note 3
to INTP11/P60
VSSVDD
Notes 1. 48-pin products only
2. μ PD78F0586, 78F0587, 78F0588 (products with operational amplifier) only
3. 44-pin and 48-pin products only
Cautions 1. Leave the IC (Internally Connected) pin open.
2. Connect the REGC pin to V
SS via a capacitor (0.47 to 1 μ F).
3. ANI0/P20/AMP0-, ANI1/P21/AMP0OUT/PGAIN, ANI2/P22/AMP0+, and ANI3/P23 to ANI7/P27 are set
in the analog input mode, P10/ANI8/AMP1-/SCK10, P11/ANI9/AMP1OUT/SI10, and
P12/ANI10/AMP1+/SO10 are set in the digital input mode after release of reset.
4. RESET/P125 immediately after release of reset is set in the external reset input.
5. For 40-pin products, set P40, P41, and P63 to output mode (PM40 = PM41 = PM63 = 0) by using
software after release of reset.
Remark Functions in parentheses ( ) in the figure above can be assigned by setting the port alternate switch control
register (MUXSEL).
<R>