Datasheet

78K0/Kx2-L CHAPTER 1 OUTLINE
R01UH0028EJ0400 Rev.4.00 22
Sep 27, 2010
1.4.3 78K0/KB2-L
PORT 0
P00, P01
PORT 2
P20 to P23
4
PORT 3
P30 to P33
POWER ON CLEAR/
LOW VOLTAGE
INDICATOR
POC/LVI
CONTROL
RESET CONTROL
PORT 6
P60, P61
2
P121, P122, P125
3
PORT 12
SYSTEM
CONTROL
RESET/P125
X1/P121
X2/EXCLK/P122
INTERRUPT
CONTROL
7
A/D CONVERTER
AV REF
INTP0/P120
SERIAL
INTERFACE IICA
SDAA0/P61
SCLA0/P60
INTP1/P30 to INTP4/P33,
INTP5/P16, INTP10/P61,
INTP11/P60
INTERNAL
HIGH-SPEED
RAM
78K/0
CPU
CORE
FLASH
MEMORY
8-bit TIMER H1
TOH1/P16
WATCHDOG TIMER
16-bit TIMER/
EVENT COUNTER 00
TI000/P00
RxD6/P14<LINSEL>
RxD6/P14<LINSEL>
RxD6/P14
TxD6/P13
SERIAL
INTERFACE UART6
LINSEL
ON-CHIP DEBUG
INTERNAL
HIGH-SPEED
OSCILLATOR
INTERNAL
LOW-SPEED
OSCILLATOR
OPERATIONAL
AMPLIFIER 0
Note
AMP0+
Note
/P22
AMP0-
Note
/P20
AMP0OUT
Note
/PGAIN
Note
/P21
2
4
ANI0/P20 to ANI3/P23,
ANI8/P10 to ANI10/P12
TOOLC0/X1, TOOLC1/P31
TOOLD0/X2, TOOLD1/P32
TO00/TI010/P01
7
EXLVI/P120
PORT 1
P10 to P17
8
VOLTAGE
REGULATOR
REGC
8-bit TIMER/
EVENT COUNTER 50
TI50/TO50/P17
8-bit TIMER/
EVENT COUNTER 51
TI51/TO51/P33
8-bit TIMER
H0
TOH0/P15
SERIAL
INTERFACE CSI10
SCK10/P10
SO10/P12
SI10/P11
AV SS
OPERATIONAL
AMPLIFIER 1
Note
AMP1+
Note
/P12
AMP1-
Note
/P10
AMP1OUT
Note
/P11
P120
IC
INTERRUPT
CONTROL
INTP0/P120
INTP1/P30 to INTP4/P33,
INTP5/P16, INTP10/P61,
INTP11/P60
RxD6/P14<LINSEL>
7
V
SS V DD
Note
μ PD78F0576, 78F0577, 78F0578 (products with operational amplifier) only
Cautions 1. Leave the IC (Internally Connected) pin open.
2. Connect the REGC pin to V
SS via a capacitor (0.47 to 1 μ F).
3. ANI0/P20/AMP0-, ANI1/P21/AMP0OUT/PGAIN, ANI2/P22/AMP0+, and ANI3/P23 are set in the
analog input mode, P10/ANI8/AMP1-/SCK10, P11/ANI9/AMP1OUT/SI10, and
P12/ANI10/AMP1+/SO10 are set in the digital input mode after release of reset.
4. RESET/P125 immediately after release of reset is set in the external reset input.