Datasheet

78K0/Kx2-L CHAPTER 8 8-BIT TIMERS H0 AND H1
R01UH0028EJ0400 Rev.4.00 341
Sep 27, 2010
Note 2. Note the following points when selecting the TM50 output as the count clock.
• Mode in which the count clock is cleared and started upon a match of TM50 and CR50 (TMC506 = 0)
Start the operation of 8-bit timer/event counter 50 first and then enable the timer F/F inversion operation
(TMC501 = 1).
• PWM mode (TMC506 = 1)
Start the operation of 8-bit timer/event counter 50 first and then set the count clock to make the duty =
50%.
It is not necessary to enable (TOE50 = 1) TO50 output in any mode.
Cautions 1. When TMHE0 = 1, setting the other bits of TMHMD0 is prohibited. However, TMHMD0 can be
refreshed (the same value is written).
2. In the PWM output mode, be sure to set the 8-bit timer H compare register 10 (CMP10) when
starting the timer count operation (TMHE0 = 1) after the timer count operation was stopped
(TMHE0 = 0) (be sure to set again even if setting the same value to CMP10).
3. The actual TOH0/P15 pin output is determined depending on PM15 and P15, besides TOH0
output.
Remarks 1. f
PRS: Peripheral hardware clock frequency
2. TMC506: Bit 6 of 8-bit timer mode control register 50 (TMC50)
TMC501: Bit 1 of TMC50