Datasheet

78K0/Kx2-L CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51
R01UH0028EJ0400 Rev.4.00 334
Sep 27, 2010
7.5 Cautions for 8-Bit Timer/Event Counters 50 and 51
(1) Timer start error
An error of up to one clock may occur in the time required for a match signal to be generated after timer start. This is
because 8-bit timer counters 50 and 51 (TM50, TM51) are started asynchronously to the count clock.
Figure 7-20. 8-Bit Timer Counter 5n (TM5n) Start Timing
Count clock
TM5n count value 00H 01H 02H 03H 04H
Timer start
(2) Reading of 8-bit timer counter 5n (TM5n)
TM5n can be read without stopping the actual counter, because the count values captured to the buffer are fixed
when it is read. The buffer, however, may not be updated when it is read immediately before the counter counts up,
because the buffer is updated at the timing the counter counts up.
Figure 7-21. 8-bit Timer Counter 5n (TM5n) Read Timing
34H 35H 36H 37H 38H 39H 3AH 3BH
34H 35H 37H 38H 3BH
Count clock
TM5n count value
Read buffer
Read signal
Remark 78K0/KY2-L, 78K0/KA2-L: n = 1
78K0/KB2-L, 78K0/KC2-L: n = 0, 1