Datasheet

78K0/Kx2-L CHAPTER 1 OUTLINE
R01UH0028EJ0400 Rev.4.00 20
Sep 27, 2010
(2) 25-pin products
PORT 0
P00, P02
PORT 3
P31-P37
7
PORT 6
P60, P61
POWER ON CLEAR/
LOW VOLTAGE
INDICATOR
POC/LVI
CONTROL
RESET CONTROL
P121, P122, P125
3
PORT 12
SYSTEM
CONTROL
RESET/P125
X1/P121
X2/EXCLK/P122
7
A/D CONVERTER
AV REF
SERIAL
INTERFACE IICA
SDAA0/P61
SCLA0/P60
INTERNAL
HIGH-SPEED
RAM
78K/0
CPU
CORE
FLASH
MEMORY
8-bit TIMER H1
WATCHDOG TIMER
16-bit TIMER/
EVENT COUNTER 00
(TI000)/P121
RxD6/P61<LINSEL>
RxD6/P61
TxD6/P60
SERIAL
INTERFACE UART6
LINSEL
ON-CHIP DEBUG
INTERNAL
HIGH-SPEED
OSCILLATOR
INTERNAL
LOW-SPEED
OSCILLATOR
OPERATIONAL
AMPLIFIER 0
Note
AMP0+
Note
/P22
AMP0-
Note
/P20
AMP0OUT
Note
/PGAIN
Note
/P21
2
2
ANI0/P20-ANI6/P26
TOOLC0/X1, TOOLC1/P31
TOOLD0/X2, TOOLD1/P32
TI000/P00
PORT 2
P20-P26
7
VOLTAGE
REGULATOR
REGC
8-bit TIMER/
EVENT COUNTER 51
(TOH1)/P00
(TOH1)/P34
SERIAL
INTERFACE CSI11
SCK11/P35
SO11/P37
SI11/P36
INTERRUPT
CONTROL
INTP0/P00
(INTP0)/P121
INTP2/P31, INTP3/P32,
INTP4/P34, INTP5/P02
RxD6/P61<LINSEL>
4
V
SS V DD
(TI51)/P00
(TI51)/P34
Note
μ PD78F0565, 78F0566, 78F0567 (products with operational amplifier) only
Cautions 1. V
SS functions alternately as the ground potential of the A/D converter. Be sure to connect VSS to
a stabilized GND (= 0 V).
2. Connect the REGC pin to V
SS via a capacitor (0.47 to 1 μ F).
3. ANI0/P20/AMP0-, ANI1/P21/AMP0OUT/PGAIN, ANI2/P22/AMP0+, and ANI3/P23 to ANI6/P26 are set
in the analog input mode after release of reset.
4. RESET/P125 immediately after release of reset is set in the external reset input.
5. Set P30 and P01 to output mode (PM30 = PM01 = 0) by using software after release of reset.
Remark Functions in parentheses ( ) in the figure above can be assigned by setting the port alternate switch control
register (MUXSEL).
<R>