Datasheet

78K0/Kx2-L CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
R01UH0028EJ0400 Rev.4.00 271
Sep 27, 2010
(3) Operation in clear & start mode by entered TI000 pin valid edge input
(CR000: capture register, CR010: compare register)
Figure 6-27. Block Diagram of Clear & Start Mode Entered by TI000 Pin Valid Edge Input
(CR000: Capture Register, CR010: Compare Register)
Timer counter
(TM00)
Clear
Output
controller
Edge
detection
Capture register
(CR000)
Capture signal
Match signal
Interrupt signal
(INTTM010)
Interrupt signal
(INTTM000)
TI000 pin
Compare register
(CR010)
Operable bits
TMC003, TMC002
Count clock
TO00 pin
TO00 output